ESL Tools for the Mainstream
Rita Glover, EDA Today, L.C.
February 2004
The total development cost of a 90-nanometer ASIC is now on
the order of US$100 million. This fact, combined with shorter product
lifetimes for electronic products, is forcing systems designers to find
other solutions. As a result, we're seeing that FPGAs and structured
ASICs (predefined arrangements of customizable logic cells and system-level
macros) are taking over the ASIC market, especially in low-volume
applications.
The numbers bear this out. Gartner Dataquest is
projecting 14 percent growth in the market for programmable logic devices in
2003 and only 6 percent growth in ASICs. Erach Desai, analyst at
American Technology Research, writes that, "ASIC design starts peaked at an
annualized rate of 10,500 in 1996, but we project that there will be under
2,500 ASIC design starts in 2005."
The responsibility for delivering design tools in the
programmable logic marketplace has been constantly shifting between EDA tool
companies and the device vendors themselves. It was fine to design the
more simple devices using the device vendors' entry-level tools, but the
complex system FPGAs now require some combination of EDA tools to master the
intricacies of design entry, design planning, timing analysis, synthesis,
and layout. Often, the design flow between all the different sets of
tools has not been all that smooth.
To enable more designers to move toward systems on
programmable chips, Altium Ltd. has come
up with a novel approach to FPGA design in a new tool suite called Nexar.
This 19-year-old Australian EDA company, formerly known as Protel until a
series of technology acquisitions, is obviously capitalizing on its roots in
the printed circuit board domain.
Altium calls Nexar a development environment for designing a
"board on chip," but we would call it an ESL (electronic system-level) tool
for the mainstream designer. Nexar enables engineers to develop
complete processor-based systems on an FPGA platform using methodologies
similar to board-level system design—but designers don't have to learn any
HDLs.
Nexar integrates hardware design tools, embedded software
development tools, IP-based components, virtual instrumentation, and a
reconfigurable hardware platform to allow mainstream engineers to
interactively design and implement an embedded system inside an FPGA.
Figure 1: Nexar from Altium combines hardware and
software design tools with a reconfigurable platform for system-on-FPGA
design. Source: Altium.
Designers use a schematic-based design methodology to define
system connectivity. This approach is based on the premise that
graphical schematic capture is more efficient for connecting functional
blocks than HDLs.
Analogous to the way designers currently work at the
board-level with physical, off-the-shelf components, Nexar comes with
libraries of royalty-free, pre-synthesized, pre-verified semiconductor IP
components. These include a range of processor cores that can be
simply dropped onto a schematic and connected together to form the system
hardware.
These components can be processed for the target FPGA
architectures of choice. This allows design portability between FPGA
device families, and it ensures a flexible, vendor-independent approach to
FPGA design. Designs can be synthesized very quickly, because the
component IP does not need to be reprocessed during synthesis.
This component system provides a method for FPGA IP delivery
that avoids the security problems associated with supplying semiconductor IP
as HDL source code. And along with the pre-synthesized IP components,
Nexar has a set of IP-based virtual instruments such as logic analyzers,
frequency counters/generators, and IO monitors that can be incorporated into
the design at the schematic level to facilitate system debugging, and they
all can be used across FPGA target architectures.
Next, Nexar comes with a versatile FPGA-based development
board called a NanoBoard that provides a reconfigurable platform for
implementing and debugging the design. Target FPGAs are housed on
plug-in daughter boards, and multiple NanoBoards can be chained together to
facilitate the design of complex multi-FPGA systems. End-user boards
can also be plugged into the system for final production PCB testing and
debugging.
To make it easy to develop system software, Nexar includes a
set of software development tools for all supplied processor cores.
Using Altium's Viper reconfigurable compiler technology, Nexar provides
high-quality code development and debugging that is fully integrated with
the hardware development environment.
Once the target design has been downloaded to the NanoBoard,
all processors in the design can be controlled and debugged from within the
Nexar environment. The software development takes place directly on
the target hardware early in the design cycle, and hardware and software are
developed in parallel. Hardware designers can download their designs
to the NanoBoard for interactive debugging during development, and software
designers can develop their program code directly on the real hardware early
in the design cycle.
This interactive design environment allows engineers to
adopt a hands-on approach to the development process. Since there is
little time or cost penalty involved in multiple design iterations,
engineers are free to try different design solutions without needing to
manufacture prototype boards.
Until now, system-level design on an FPGA platform has been
a difficult exercise, particularly when it comes to bringing a processor
into the FPGA. Altium is changing this by taking proven board-level
system design methodologies and retargeting them for FPGA architectures, and
by integrating hardware design and software development within a single
environment.
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